SRAM cells are designed to ensure that the contents of the cell are not altered during read access and the cell can quickly change its state during write operation.

This paper presents a Seven-transistor SRAM cell intended for the advanced microprocessor. A low power write scheme, which reduces SRAM power by using seven-transistor sense-amplifying memory cell, ...

IBM has unveiled what it says is the first working static random access memory cell for a future generation in chip manufacturing, based on a 22 nm scale. The size of SRAM cells — which in turn ...